Invited Talk


Jeffrey S. Vetter

Oak Ridge National Laboratory

Title: Using Application-Specific Performance Models to Inform Dynamic Scheduling


Concerns about energy-efficiency and reliability have forced our community to reexamine the full spectrum of architectures, software, and algorithms that constitute our ecosystem. While architectures have remained relatively stable for almost two decades, new architectural features, such as heterogeneous processing, nonvolatile memory, and optical interconnection networks, will demand that software systems and applications be redesigned to exploit these new capabilities. A key capability of this activity is accurate modeling of performance, power, and resiliency. Aspen is a domain specific language for structured analytical modeling of applications and architectures. We have developed Aspen to facilitate rapid exploration of such design spaces. Because of the succinctness, expressiveness, and composability of Aspen, it can be used to model many properties of a system including performance, power, and resiliency. Aspen has been used to model traditional HPC applications, and it has recently been extended to model scientific workflows for HPC systems and scientific instruments, like ORNL’s Spallation Neutron Source. Models can be manually written or automatically generated from other structured representations, such as application source code or execution DAGs. These Aspen models can then be used for a variety of purposes including predicting performance of future applications, evaluating system architectures, informing runtime scheduling decisions, and identifying system anomalies. Aspen is joint work with Jeremy Meredith (ORNL).


Jeffrey Vetter, Ph.D., is a Distinguished R&D Staff Member at Oak Ridge National Laboratory (ORNL). At ORNL, Vetter is the founding group leader of the Future Technologies Group in the Computer Science and Mathematics Division. Vetter also holds joint appointments at the Georgia Institute of Technology and the University of Tennessee-Knoxville. Vetter earned his Ph.D. in Computer Science from the Georgia Institute of Technology. He joined ORNL in 2003, after stints as a computer scientist and project leader at Lawrence Livermore National Laboratory, and postdoctoral researcher at the University of Illinois at Urbana-Champaign. Currently, Vetter's research investigates the design of next-generation extreme-scale HPC architectures, including non-volatile memory systems, heterogeneous multicore processors, and field-programmable gate arrays (FPGAs), for extreme scale applications. Vetter is a Senior Member of the IEEE, and a Distinguished Scientist Member of the ACM. In 2010, Vetter, as part of an interdisciplinary team from Georgia Tech, NYU, and ORNL, was awarded the ACM Gordon Bell Prize . Also, his work has won awards at major conferences including Best Paper Awards at the International Parallel and Distributed Processing Symposium (IPDPS) and EuroPar, Best Student Paper Finalist at SC14, and Best Presentation at EASC 2015. His recent books, entitled “Contemporary High Performance Computing: From Petascale toward Exascale (Vols. 1 and 2),” survey the international landscape of HPC. See his website for more information.