Non quia difficilia sunt non audemus, sed quia non audemus difficilia sunt
Home -> Publications
Home
  Publications
    
edited volumes
  Awards
  Research
  Teaching
  Miscellaneous
  Full CV [pdf]
  BLOG






  Events








  Past Events





Publications of Torsten Hoefler
Salvatore Di Girolamo, Andreas Kurth, Alexandru Calotoiu, Thomas Benz, Timo Schneider, Jakub Beránek, Luca Benini, Torsten Hoefler:

 A RISC-V in-network accelerator for flexible high-performance low-power packet processing

(In Proceedings of the 48th Annual International Symposium on Computer Architecture (ISCA'21), Jun. 2021)

Abstract

The capacity of offloading data and control tasks to the network is becoming increasingly important, especially if we consider the faster growth of network speed when compared to CPU frequencies. In-network compute alleviates the host CPU load by running tasks directly in the network, enabling additional computation/communication overlap and potentially improving overall application performance. However, sustaining bandwidths provided by next-generation networks, e.g., 400 Gbit/s, can become a challenge. sPIN is a programming model for in-NIC compute, where users specify handler functions that are executed on the NIC, for each incoming packet belonging to a given message or flow. It enables a CUDA-like acceleration, where the NIC is equipped with lightweight processing elements that process network packets in parallel. We investigate the architectural specialties that a sPIN NIC should provide to enable high-performance, low-power, and flexible packet processing. We introduce PsPIN, a first open-source sPIN implementation, based on a multi-cluster RISC-V architecture and designed according to the identified architectural specialties. We investigate the performance of PsPIN with cycle-accurate simulations, showing that it can process packets at 400 Gbit/s for several use cases, introducing minimal latencies (26 ns for 64 B packets) and occupying a total area of 18.5 mm 2 (22 nm FDSOI).

Documents

download article:


Recorded talk (best effort)

 

BibTeX

@inproceedings{,
  author={Salvatore Di Girolamo and Andreas Kurth and Alexandru Calotoiu and Thomas Benz and Timo Schneider and Jakub Beránek and Luca Benini and Torsten Hoefler},
  title={{A RISC-V in-network accelerator for flexible high-performance low-power packet processing}},
  year={2021},
  month={Jun.},
  booktitle={Proceedings of the 48th Annual International Symposium on Computer Architecture (ISCA'21)},
  source={http://www.unixer.de/~htor/publications/},
}


serving: 54.172.135.8:49920© Torsten Hoefler